Silicon retina for motion computation

An analog VLSI processor for motion computation is presented. It is based on the Hassenstein-Reichardt-Poggio model for information processing in the visual system of the fly. The authors show how neural network models can be mapped on silicon integrated circuits for performing tasks that can not be handled efficiently by digital computing machinery. The design is based on current-mode subthreshold MOS circuits using device-level design and exploiting the translinear property of the MOS transistor. Experimental results from fabricated chips are presented.<<ETX>>

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