Current-mode subthreshold MOS implementation of the Herault-Jutten autoadaptive network

The authors explore translinear circuits in subthreshold MOS technology and current-mode design techniques for the implementation of neuromorphic analog network processing. The architecture, also known as the Herault-Jutten network, performs an independent component analysis and is essentially a continuous-time recursive linear adaptive filter. Analog I/O interface, weight coefficients, and adaptation blocks are all integrated on the chip. A small network with six neurons and 30 synapses was fabricated in a 2- mu m double-polysilicon, double-metal n-well CMOS process. Circuit designs at the transistor level yield area-efficient implementations for neurons, synapses, and the adaptation blocks. The authors discuss the design methodology and constraints as well as test results from the fabricated chips. >

[1]  C. McGillem,et al.  Probabilistic methods of signal and system analysis , 1971 .

[2]  B. Gilbert Translinear circuits: a proposed classification , 1975 .

[3]  J. Fellrath,et al.  CMOS analog integrated circuits based on weak inversion operations , 1977 .

[4]  M.M. Sondhi,et al.  Silencing echoes on the telephone network , 1980, Proceedings of the IEEE.

[5]  D. Brillinger Time Series: Data Analysis and Theory. , 1981 .

[6]  B. Gilbert A monolithic 16-channels analog array normalizer , 1984, IEEE Journal of Solid-State Circuits.

[7]  Bernard Widrow,et al.  Adaptive Signal Processing , 1985 .

[8]  K. Wise,et al.  An implantable multielectrode array with on-chip signal processing , 1986 .

[9]  Yannis Tsividis Analog MOS integrated circuits-certain new ideas, trends, and obstacles , 1987 .

[10]  Christian Jutten,et al.  Space or time adaptive signal processing by neural network models , 1987 .

[11]  Alan F. Murray,et al.  Asynchronous VLSI neural networks using pulse-stream arithmetic , 1988 .

[12]  Carver Mead,et al.  Analog VLSI and neural systems , 1989 .

[13]  Eric A. Vittoz,et al.  CMOS Integration of Herault-Jutten Cells for Separation of Sources , 1989, Analog VLSI Implementation of Neural Systems.

[14]  S. Tam,et al.  An electrically trainable artificial neural network (ETANN) with 10240 'floating gate' synapses , 1990, International 1989 Joint Conference on Neural Networks.

[15]  Andreas G. Andreou,et al.  Synthetic Neural Circuits Using Current-Domain Signal Representations , 1989, Neural Computation.

[16]  J. J. Paulos,et al.  Artificial neural networks using MOS analog multipliers , 1990 .

[17]  Bernabe Linares-Barranco,et al.  A CMOS Implementation of Fitzhugh-Nagumo Neuron Model , 1990, ESSCIRC '90: Sixteenth European Solid-State Circuits Conference.

[18]  Carver A. Mead,et al.  Neuromorphic electronic systems , 1990, Proc. IEEE.

[19]  Lang Tong,et al.  Indeterminacy and identifiability of blind identification , 1991 .

[20]  A. M. Chiang,et al.  A CCD programmable image processor and its neural network applications , 1991 .

[21]  Timothy X. Brown,et al.  Competitive neural architecture for hardware solution to the assignment problem , 1991, Neural Networks.

[22]  John Lazzaro,et al.  A silicon model of an auditory neural representation of spectral shape , 1991 .

[23]  Christian Jutten,et al.  Blind separation of sources, part I: An adaptive algorithm based on neuromimetic architecture , 1991, Signal Process..

[24]  Koichiro Mashiko,et al.  A 336-neuron, 28 K-synapse, self-learning neural network chip with branch-neuron-unit architecture , 1991 .

[25]  Andreas G. Andreou,et al.  Current-mode subthreshold MOS circuits for analog VLSI neural systems , 1991, IEEE Trans. Neural Networks.

[26]  Andreas G. Andreou,et al.  A Contrast Sensitive Silicon Retina with Reciprocal Synapses , 1991, NIPS.

[27]  Lawrence D. Jackel,et al.  An analog neural network processor with programmable topology , 1991 .

[28]  R. Douglas,et al.  A silicon neuron , 1991, Nature.

[29]  Robert W. Newcomb,et al.  VLSI implementation of ART1 memories , 1991, IEEE Trans. Neural Networks.

[30]  Weimin Liu,et al.  Voiced-speech representation by an analog silicon model of the auditory periphery , 1992, IEEE Trans. Neural Networks.

[31]  Ralph Etienne-Cummings,et al.  An analog neural computer with modular architecture for real-time dynamic computations , 1992 .

[32]  Yannis Tsividis,et al.  A reconfigurable VLSI neural network , 1992 .

[33]  Armando Freitas da Rocha,et al.  Neural Nets , 1992, Lecture Notes in Computer Science.