Exploiting Parallelism by Data Dependency Elimination: A Case Study of Circuit Simulation Algorithms
暂无分享,去创建一个
Wei Wu | Hao Yu | Fang Gong | Lei He | Rahul Krishnan | Wei Wu | Hao Yu | Lei He | R. Krishnan | Fang Gong
[1] Xiaoye S. Li,et al. An overview of SuperLU: Algorithms, implementation, and user interface , 2003, TOMS.
[2] Timothy A. Davis,et al. Algorithm 907 , 2010 .
[3] Tom R. Halfhill. NVIDIA's Next-Generation CUDA Compute and Graphics Architecture, Code-Named Fermi, Adds Muscle for Parallel Processing , 2009 .
[4] Wayne B. Hayes,et al. Algorithm 908 , 2010 .
[5] Jacob K. White,et al. Efficient Steady-State Analysis Based on Matrix-Free Krylov-Subspace Methods , 1995, 32nd Design Automation Conference.
[6] A. DeHon,et al. Parallelizing sparse Matrix Solve for SPICE circuit simulation using FPGAs , 2009, 2009 International Conference on Field-Programmable Technology.
[7] Paul E. Hasler,et al. A MITE-Based Translinear FPAA , 2012, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.
[8] H. V. D. Vorst,et al. A parallel linear system solver for circuit simulation problems , 2000 .
[9] Hao Yu,et al. A structured parallel periodic Arnoldi shooting algorithm for RF-PSS analysis based on GPU platforms , 2011, 16th Asia and South Pacific Design Automation Conference (ASP-DAC 2011).
[10] Timothy A. Davis,et al. The university of Florida sparse matrix collection , 2011, TOMS.
[11] D. Ross. Computer-aided design , 1961, CACM.
[12] F. Wu,et al. Solution of large-scale networks by tearing , 1976 .
[13] Kurt Keutzer,et al. Parallelizing CAD: A timely research agenda for EDA , 2008, 2008 45th ACM/IEEE Design Automation Conference.
[14] Wei Wu,et al. FPGA Accelerated Parallel Sparse Matrix Factorization for Circuit Simulations , 2011, ARC.
[15] Hao Yu,et al. A Parallel and Incremental Extraction of Variational Capacitance With Stochastic Geometric Moments , 2012, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.
[16] Glen Gibb,et al. NetFPGA--An Open Platform for Gigabit-Rate Network Switching and Routing , 2007, 2007 IEEE International Conference on Microelectronic Systems Education (MSE'07).
[17] Nachiket Kapre,et al. GraphStep: A System Architecture for Sparse-Graph Algorithms , 2006, 2006 14th Annual IEEE Symposium on Field-Programmable Custom Computing Machines.
[18] P. Glaskowsky. NVIDIA ’ s Fermi : The First Complete GPU Computing Architecture , 2009 .
[19] Wei Wu,et al. An EScheduler-Based Data Dependence Analysis and Task Scheduling for Parallel Circuit Simulation , 2011, IEEE Transactions on Circuits and Systems II: Express Briefs.
[20] J. Gilbert,et al. Sparse Partial Pivoting in Time Proportional to Arithmetic Operations , 1986 .
[21] James Demmel,et al. A Supernodal Approach to Sparse Partial Pivoting , 1999, SIAM J. Matrix Anal. Appl..
[22] Hao Yu,et al. A robust periodic arnoldi shooting algorithm for efficient analysis of large-scale RF/MM ICs , 2010, Design Automation Conference.
[23] Yiyu Shi,et al. Fast Analysis of a Large-Scale Inductive Interconnect by Block-Structure-Preserved Macromodeling , 2010, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.
[24] Yiyu Shi,et al. A Fast Block Structure Preserving Model Order Reduction for Inverse Inductance Circuits , 2006, 2006 IEEE/ACM International Conference on Computer Aided Design.
[25] Henk A. van der Vorst,et al. A parallel linear system solver for circuit simulation problems , 2000, Numer. Linear Algebra Appl..
[26] Albert E. Ruehli,et al. The modified nodal approach to network analysis , 1975 .
[27] Pawel Gepner,et al. Multi-Core Processors: New Way to Achieve High System Performance , 2006, PARELEC.
[28] Yangdong Deng,et al. Taming irregular EDA applications on GPUs , 2009, 2009 IEEE/ACM International Conference on Computer-Aided Design - Digest of Technical Papers.