Scheduling on profiles of constant breadth

n unit-executive-time tasks subject to precedence constraints are to be scheduled on a system of identical processors. The precedence constraints are represented as a directed acyclic graph (dag). A sequence of natural numbers, called a profile, specifies how many processors are available in each time-slot. We seek an optimal schedule for a given dag and profile. The complexity of this scheduling problem depends strongly on the breadth of the profile, which is the maximum number of processors that are available in any time-slot. For the case where the breadth of the profile is two efficient algorithms has been published. If the breadth of the profile is unbounded, then the corresponding decision problem is NP-complete. We give polynomial algorithms for special cases of the remaining open problem: finding an optimal schedule in the case where the profile has constant breadth m (GREATERTHEQ) 3. Our main method is the following: Finding an optimal schedule for a dag of at least m components and a profile of breadth m reduces to finding an optimal schedule for the subdag consisting of all components that are higher than one plus the height of an m-th highest component. That is, given an optimal schedule for this subdag, then an optimal schedule for the whole dag can be found in time O(n + e), where e is the number of edges in the dag. Using the above result combined with dynamic programming we achieve the following time bounds: O(n('m-1)) if the dag is a level order or an inforest, O(n('m-1)log n) for outforest, O(n('4m-4)log n) for opposing forest, and O(n('h(m-1)+1)) for dags of height h. In all the above polynomial cases, the corresponding decision problem becomes NP-complete if the breadth of the profile is unbounded. In the Appendix we discuss known and new NP-completeness results. In particular, we show that deciding whether there exists a schedule for a dag of height one and a profile of the following form is NP-complete: an unbounded number of processors in exactly one slot and one processor in all other slots.