Evolvable Systems: From Biology to Hardware

The complete design of a circuit typically includes the tasks of creating the circuit’s placement and routing as well as creating its topology and component sizing. Design engineers perform these four tasks sequentially. Each of these four tasks is, by itself, either vexatious or computationally intractable. This paper describes an automatic approach in which genetic programming starts with a high-level statement of the requirements for the desired circuit and simultaneously creates the circuit’s topology, component sizing, placement, and routing as part of a single integrated design process. The approach is illustrated using the problem of designing a 60 decibel amplifier. The fitness measure considers the gain, bias, and distortion of the candidate circuit as well as the area occupied by the circuit after the automatic placement and routing.

[1]  O. Vornberger,et al.  Genetic design of VLSI-layouts , 1995 .

[2]  Adrian Stoica,et al.  Toward evolvable hardware chips: Experiments with a programmable transistor array , 1999, Proceedings of the Seventh International Conference on Microelectronics for Neural, Fuzzy and Bio-Inspired Systems.

[3]  C. D. Gelatt,et al.  Optimization by Simulated Annealing , 1983, Science.

[4]  Steven A. Guccione,et al.  XBI: a Java-based interface to FPGA hardware , 1998, Other Conferences.

[5]  Lewis Wolpert,et al.  The Triumph of Embryo , 1991 .

[6]  Wolfgang Banzhaf,et al.  Genetic Programming: An Introduction , 1997 .

[7]  C. Ortega-Sanchez,et al.  Fault-tolerant systems: the way biology does it! , 1997, Proceedings 23rd Euromicro Conference New Frontiers of Information Technology - Short Contributions -.

[8]  Philip G. K. Reiser Evolutionary Computation and the Tinkerer's Evolving Toolbox , 1998, EuroGP.

[9]  John R. Koza,et al.  Design of a High-Gain Operational Amplifier and Other Circuits by Means of Genetic Programming , 1997, Evolutionary Programming.

[10]  Antoine Rauzy,et al.  A brief introduction to Binary Decision Diagrams , 1996 .

[11]  Stuart J. Flockton,et al.  Intrinsic Circuit Evolution Using Programmable Analogue Arrays , 1998, ICES.

[12]  Julian Francis Miller,et al.  Cartesian genetic programming , 2000, GECCO '10.

[13]  John Andrews,et al.  A computerized fault tree construction methodology , 1997 .

[14]  Gianluca Tempesti,et al.  A robust multiplexer-based FPGA inspired by biological systems , 1997, J. Syst. Archit..

[15]  Kenji Toda,et al.  Real-world applications of analog and digital evolvable hardware , 1999, IEEE Trans. Evol. Comput..

[16]  Hitoshi Iba,et al.  Evolvable Hardware and Its Applications to Pattern Recognition and Fault-Tolerant Systems , 1995, Towards Evolvable Hardware.

[17]  Adrian Thompson,et al.  Silicon evolution , 1996 .

[18]  Steven A. Guccione,et al.  GeneticFPGA: a java-based tool for evolving stable circuits , 1999, Optics East.

[19]  John R. Koza,et al.  Genetic Programming III - Darwinian Invention and Problem Solving , 1999, Evolutionary Computation.

[20]  M. Schoenauer,et al.  Optimisation topologique de formes par algorithmes génétiques , 1997 .

[21]  Hugo de Garis,et al.  EVOLVABLE HARDWARE Genetic Programming of a Darwin Machine , 1993 .

[22]  Raoul Tawel,et al.  Evolutionary experiments with a fine-grained reconfigurable architecture for analog and digital CMOS circuits , 1999, Proceedings of the First NASA/DoD Workshop on Evolvable Hardware.

[23]  E. Bonomi,et al.  The N-City Travelling Salesman Problem: Statistical Mechanics and the Metropolis Algorithm , 1984 .

[24]  Lashon B. Booker,et al.  Intelligent Behavior as an Adaptation to the Task Environment , 1982 .

[25]  Adrian Thompson,et al.  On the Automatic Design of Robust Electronics Through Artificial Evolution , 1998, ICES.

[26]  Peter Thomson,et al.  Experiments in Evolvable Filter Design Using Pulse Based Programmable Analogue VLSI Models , 2000, ICES.

[27]  Paul J. Layzell,et al.  Explorations in design space: unconventional electronics design through artificial evolution , 1999, IEEE Trans. Evol. Comput..

[28]  Hiroshi Yokoi,et al.  A Gate-Level EHW Chip: Implementing GA Operations and Reconfigurable Hardware on a Single LSI , 1998, ICES.

[29]  Adrian Stoica,et al.  A Flexible Model of a CMOS Field Programmable Transistor Array Targeted for Hardware Evolution , 2000, ICES.

[30]  Marley M. B. R. Vellasco,et al.  Analog Circuits Evolution in Extrinsic and Intrinsic Modes , 1998, ICES.

[31]  Marco Tomassini,et al.  Online Autonomous Evolware , 1996, ICES.

[32]  Andy M. Tyrrell,et al.  Design of a basic cell to construct embryonic arrays , 1998 .

[33]  Andrew M. Tyrrell,et al.  MUXTREE Revisited: Embryonics as a Reconfiguration Strategy in Fault-Tolerant Processor Arrays , 1998, ICES.

[34]  Jason D. Lohn,et al.  Automated Analog Circuit Sythesis Using a Linear Representation , 1998, ICES.

[35]  Alister Hamilton,et al.  Palmo: Field Programmable Analogue and Mixed-Signal VLSI for Evolvable Hardware , 1998, ICES.

[36]  Paul J. Layzell,et al.  A New Research Tool for Intrinsic Hardware Evolution , 1998, ICES.

[37]  Julian Francis Miller,et al.  Aspects of Digital Evolution: Geometry and Learning , 1998, ICES.

[38]  David Robinson,et al.  Fast Adaptive Image Processing in FPGAs Using Stack Filters , 1998, FPL.

[39]  Claude E. Shannon,et al.  The synthesis of two-terminal switching circuits , 1949, Bell Syst. Tech. J..

[40]  Andy M. Tyrrell,et al.  BIOLOGICALLY INSPIRED FAULT-TOLERANT ARCHITECTURES FOR REAL-TIME CONTROL APPLICATIONS , 1999 .

[41]  Marley M. B. R. Vellasco,et al.  Artificial evolution of active filters: a case study , 1999, Proceedings of the First NASA/DoD Workshop on Evolvable Hardware.

[42]  Julian F. Miller,et al.  Designing Electronic Circuits Using Evolutionary Algorithms. Arithmetic Circuits: A Case Study , 2007 .

[43]  Stuart A. Kauffman,et al.  ORIGINS OF ORDER , 2019, Origins of Order.

[44]  Andrew M. Tyrrell,et al.  Reliability analysis in self-repairing embryonic systems , 1999, Proceedings of the First NASA/DoD Workshop on Evolvable Hardware.

[45]  Philippe Millet,et al.  Fault Tolerance of a Large-Scale MIMD Architecture Using a Genetic Algorithm , 1998, ICES.

[46]  Gaspare Galati,et al.  Advanced Radar Techniques and Systems , 1993 .

[47]  Adrian Thompson,et al.  An Evolved Circuit, Intrinsic in Silicon, Entwined with Physics , 1996, ICES.