Physical intuition and VLSI physical design

We characterize physical design of chips and packages as a set of constrained global near‐optimization problems. Heuristics appropriate to these problems are discussed, including some that are strongly motivated by analogies to physical processes. We contrast several problem‐solving approaches or frameworks: hierarchical decomposition, ′greedy′ algorithms, probabilistic methods (e.g. Monte Carlo simulated annealing), and iterative‐improvement methods using adjustable penalty functions. We emphasize that the discovery of a physically‐appealing analogy can aid in the choice of an approach, but does not substitute for the use of problem domain‐specific knowledge as well.To illustrate issues guiding the choice of problem‐solving framework and heuristics, we discuss an iterative‐improvement interconnection routing system in production use at IBM. This system has yielded significant savings in manual effort and fabrication costs, and provided greater design flexibility while satisfying technology constraints, i...