Dynamic precision management for loop computations on reconfigurable architectures

Reconfigurable architectures promise significant performance benefits by customizing the configurations to suit the computations. Variable precision for computations is one important method of customization for which reconfigurable architectures are well suited. The precision of the operations can be modified dynamically at run-time to match the precision of the operands. Though the advantages of reconfigurable architectures for dynamic precision have been discussed before, we are not aware of any work which analyzes the qualitative and quantitative benefits which can be achieved This paper develops a formal methodology for dynamic precision management. We show how the precision requirements can be analyzed for typical computations in loops by computing the precision variation curve. We develop algorithms to generate optimal schedules of configurations using the precision variation curves. Using our approach, we demonstrate 25%-37% improvement in the total execution time of an example loop computation on the XC6200 device.

[1]  Duncan A. Buell,et al.  Splash 2 - FPGAs in a custom computing machine , 1996 .

[2]  Maya Gokhale,et al.  The NAPA adaptive processing architecture , 1998, Proceedings. IEEE Symposium on FPGAs for Custom Computing Machines (Cat. No.98TB100251).

[3]  Milos D. Ercegovac,et al.  Variable long-precision arithmetic (vlpa) for reconfigurable coprocessor architectures , 1998 .

[4]  John Wawrzynek,et al.  Garp: a MIPS processor with a reconfigurable coprocessor , 1997, Proceedings. The 5th Annual IEEE Symposium on Field-Programmable Custom Computing Machines Cat. No.97TB100186).

[5]  John Wawrzynek,et al.  Object oriented circuit-generators in Java , 1998, Proceedings. IEEE Symposium on FPGAs for Custom Computing Machines (Cat. No.98TB100251).

[6]  Brad L. Hutchings,et al.  An Assessment of the Suitability of FPGA-Based Systems for Use in Digital Signal Processing , 1995, FPL.

[7]  Michael J. Flynn,et al.  PAM-Blox: high performance FPGA design for adaptive computing , 1998, Proceedings. IEEE Symposium on FPGAs for Custom Computing Machines (Cat. No.98TB100251).

[8]  Steven Trimberger,et al.  A time-multiplexed FPGA , 1997, Proceedings. The 5th Annual IEEE Symposium on Field-Programmable Custom Computing Machines Cat. No.97TB100186).

[9]  A. Lynn Abbott,et al.  Implementation of a 2-D Fast Fourier Transform on an FPGA-Based Custom Computing Machine , 1995, FPL.

[10]  Wayne Luk,et al.  Using Reconfigurable Hardware to Speed up Product Development and Performance , 1995, FPL.

[11]  Viktor K. Prasanna,et al.  Mapping Loops onto Reconfigurable Architectures , 1998, FPL.

[12]  Stephen M. Scalera,et al.  The design and implementation of a context switching FPGA , 1998, Proceedings. IEEE Symposium on FPGAs for Custom Computing Machines (Cat. No.98TB100251).

[13]  Mark Shand,et al.  Programmable active memories: reconfigurable systems come of age , 1996, IEEE Trans. Very Large Scale Integr. Syst..

[14]  Viktor K. Prasanna,et al.  String matching on multicontext FPGAs using self-reconfiguration , 1999, FPGA '99.